2026
CombRewriter: Enabling Combinational Logic Simplification in
MLIR-Based Hardware Compiler
Haisheng Zheng , Zhuolun He, Shuo Yin, Yuzhe Ma, Bei Yu
IEEE/ACM Asian and South Pacific Design Automation Conference (ASP-DAC )
Hong Kong, Jan. 19 - 22, 2026
2025
MM-GRADE: A Multi-Modal EDA Tool Documentation QA Framework
Leveraging Retrieval Augmented Generation
Yuan Pu, Zhuolun He, Shutong Lin, Jiajun Qin, Xinyun Zhang, Hairuo Han, Haisheng Zheng ,
Yuqi Jiang et al .
IEEE/ACM International Conference on Computer-Aided Design (ICCAD )
Munich, Germany, Oct. 26 – 30, 2025
Efficient
OpAmp Adaptation for Zoom Attention to Golden
Contexts
Haoyuan Wu†, Rui Ming†, Haisheng Zheng , Zhuolun He, Bei Yu
The Annual Meeting of the Association for Computational Linguistics (ACL )
Vienna, Jul. 27 – Aug. 01, 2025
[Paper ] [Slides ] [Poster ] [Code ]
ChatLS: Multimodal Retrieval-Augmented Generation and
Chain-of-Thought for Logic Synthesis Script Customization
Haisheng Zheng , Haoyuan Wu, Zhuolun He
ACM/IEEE Design Automation Conference (DAC )
San Francisco, CA, Jun. 22 – 25, 2025
[Paper ] [Slides ] [Poster ]
Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System
for Electronic Design Automation
Haoyuan Wu, Haisheng Zheng , Zhuolun He, Bei Yu
Nations of the Americas Chapter of the Association for Computational Linguistics
(NAACL )
Albuquerque, New Mexico, Apr. 30 – May. 04, 2025
[Paper ] [Poster ] [Code ]
Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG
Alignment
Haoyuan Wu†, Haisheng Zheng† , Yuan Pu, Bei Yu
The International Conference on Learning Representations (ICLR )
Singapore, Apr. 24 – 28, 2025
[Paper ] [Slides ] [Poster ]
iRw: An Intelligent Rewriting
Haisheng Zheng , Haoyuan Wu, Zhuolun He, Yuzhe Ma, Bei Yu
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE )
Lyon, France, Mar. 31 – Apr. 02, 2025
[Paper ] [Slides ] [Poster ]
IncreMacro: Incremental Macro Placement Refinement
Yuan Pu, Tinghuan Chen, Zhuolun He, Jiajun Qin, Chen Bai, Haisheng Zheng , Yibo Lin, Bei
Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
(TCAD )
vol. 44, no. 08, pp. 3222–3235, 2025
[Paper ]
2024
ChatEDA: A Large Language Model Powered Autonomous Agent for
EDA
Haoyuan Wu†, Zhuolun He†, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng , Bei
Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
(TCAD )
vol. 43, no. 10, pp. 3184–3197, 2024
[Paper ] [Code ]
Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for
Instruction Tuning on General Tasks
Haoyuan Wu, Haisheng Zheng , Zhuolun He, Bei Yu
Empirical Methods in Natural Language Processing (EMNLP )
Miami, Florida, Nov. 12 - 16, 2024
[Paper ] [Poster ] [Code ] [Hugging Face ]
CBTune: Contextual Bandit Tuning for Logic Synthesis
Fangzhou Liu, Zehua Pei, Ziyang Yu, Haisheng Zheng , Zhuolun He, Tinghuan Chen, Bei
Yu
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE )
Valencia, Spain, Mar. 25 – 27, 2024
[Paper ] [Slides ] [Poster ]
IncreMacro: Incremental Macro Placement Refinement
Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng , Yibo Lin, Bei Yu
ACM International Symposium on Physical Design (ISPD )
Taipei, Mar. 12 – 15, 2024
[Paper ] [Slides ] [Best Paper Award Nomination ]
LSTP: A Logic Synthesis Timing Predictor
Haisheng Zheng , Zhuolun He, Fangzhou Liu, Zehua Pei, Bei Yu
IEEE/ACM Asian and South Pacific Design Automation Conference (ASP-DAC )
South Korea, Jan. 22 – 25, 2024
[Paper ] [Slides ]
2023
AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree
Search
Zehua Pei, Fangzhou Liu, Zhuolun He, Guojin Chen, Haisheng Zheng , Keren Zhu, Bei Yu
IEEE/ACM International Conference on Computer-Aided Design (ICCAD )
San Francisco, CA, Oct. 29 - Nov. 02, 2023
[Paper ] [Slides ] [Poster ]
ChatEDA: A Large Language Model Powered Autonomous Agent for
EDA
Zhuolun He†, Haoyuan Wu†, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng , Bei
Yu
ACM/IEEE Workshop on Machine Learning for CAD (MLCAD )
Utah, Sep. 11 - 13, 2023
[Paper ] [Code ]
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical
GPU Acceleration
Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng , Yuzhe Ma, Bei Yu
ACM/IEEE Design Automation Conference (DAC )
San Francisco, CA, Jul. 09 – 13, 2023
[Paper ] [Slides ] [Code ]
A High-Performance Accelerator for Super-Resolution Processing on Embedded
GPU
Wenqian Zhao, Yang Bai, Qi Sun, Wenbo Li, Haisheng Zheng , Nianjuan Jiang, Jiangbo Lu,
Bei Yu, Martin Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
(TCAD )
vol. 42, no. 10, pp. 3210–3223, 2023
[Paper ]
2022
GTuner: Tuning DNN Computations on GPU via Graph Attention
Network
Qi Sun, Xinyun Zhang, Hao Geng, Yuxuan Zhao, Yang Bai, Haisheng Zheng , Bei Yu
ACM/IEEE Design Automation Conference (DAC )
San Francisco, CA, Jul. 10 – 14, 2022
[Paper ] [Slides ]
2021
A High-Performance Accelerator for Super-Resolution Processing on Embedded
GPU
Wenqian Zhao, Qi Sun, Yang Bai, Wenbo Li, Haisheng Zheng , Bei Yu, Martin Wong
IEEE/ACM International Conference on Computer-Aided Design (ICCAD )
Online, Nov. 1 - 4, 2021
[Paper ] [Slides ]
Last Updated Feb. 2025